FPGA-BASED MATCH FILTER IMPLEMENTATION IN FREQUENCY DOMAIN USING AN OVERLAP-ADD METHOD

Orduyilmaz A., Kara G., Serin M., Yildirim A., EFE M.

22nd IEEE Signal Processing and Communications Applications Conference (SIU), Trabzon, Türkiye, 23 - 25 Nisan 2014, ss.1279-1282 identifier identifier

  • Yayın Türü: Bildiri / Tam Metin Bildiri
  • Doi Numarası: 10.1109/siu.2014.6830470
  • Basıldığı Şehir: Trabzon
  • Basıldığı Ülke: Türkiye
  • Sayfa Sayıları: ss.1279-1282
  • Ankara Üniversitesi Adresli: Evet

Özet

In this research, a real time matched filter is implemented on FPGA using an overlap-add method. The matched filter that increases the signal-to-noise ratio (SNR) for pulse compression and low probability intercept (LPI) radars is implemented in digital domain. This design is implemented on Xilinx Virtex-5 based processing board that samples in intermediate frequency (2.5 GHz). In the overlap-add method, we propose to design the matched filter by using two parallel FFT cores. Furthermore, the matched filter results are presented for different intra-pulse modulations.